Modeling Power Vertical High-k MOS Device With Interface Charges via Superposition Methodology-Breakdown Voltage and Specific ON-Resistance
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DOI: 10.1109/ted.2018.2870174
Abstract: An analytical model for the power vertical MOS device with a high-k insulating dielectric (HKMOS) is derived via the superposition methodology on the condition of punchthrough. Considering three portions—the superjunction part, the p-i-n diode, and… read more here.
Keywords: power vertical; superposition methodology; methodology; mos device ... See more keywords