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Optimization Techniques for the Efficient Implementation of High-Rate Layered QC-LDPC Decoders

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Published in 2017 at "IEEE Transactions on Circuits and Systems I: Regular Papers"

DOI: 10.1109/tcsi.2016.2612655

Abstract: For high-rate low-density parity-check (LDPC) codes, layered decoding processing can be reordered such that the first-in-first-out (FIFO) buffer that stores variable-to-check (V2C) messages is not needed and, hence, the memory area can be minimized, but… read more here.

Keywords: efficient implementation; optimization techniques; high rate; rate ... See more keywords