An Efficient Temporal Data Prefetcher for L1 Caches
Sign Up to like & getrecommendations! Published in 2017 at "IEEE Computer Architecture Letters"
DOI: 10.1109/lca.2017.2654347
Abstract: Server workloads frequently encounter L1-D cache misses, and hence, lose significant performance potential. One way to reduce the number of L1-D misses or their effect is data prefetching. As L1-D access sequences have high temporal… read more here.
Keywords: temporal data; domino; domino prefetcher; efficient temporal ... See more keywords
Practical Temporal Prefetching With Compressed On-Chip Metadata
Sign Up to like & getrecommendations! Published in 2022 at "IEEE Transactions on Computers"
DOI: 10.1109/tc.2021.3065909
Abstract: Temporal prefetchers are powerful because they can prefetch irregular sequences of memory accesses, but temporal prefetchers are commercially infeasible because they store large amounts of metadata in DRAM. This article presents Triage, the first temporal… read more here.
Keywords: percent; triage; chip metadata; practical temporal ... See more keywords