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Built-In Test for Hidden Delay Faults

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Published in 2019 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"

DOI: 10.1109/tcad.2018.2864255

Abstract: Marginal hardware introduces severe reliability threats throughout the life cycle of a system. Although marginalities may not affect the functionality of a circuit immediately after manufacturing, they can degrade into hard failures and must be… read more here.

Keywords: delay faults; test; test hidden; built test ... See more keywords