Articles with "testing socs" as a keyword



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Testing 3D-SoCs Using 2-D Time-Division Multiplexing

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Published in 2018 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"

DOI: 10.1109/tcad.2017.2780054

Abstract: Through-silicon vias (TSVs) are used as high-speed vertical interconnects between dies in a 3-D system-on-a-chip (SoC). However, their speed cannot be exploited during test application due to inherent limitations of the scan-chains of the cores,… read more here.

Keywords: division multiplexing; time; test; time division ... See more keywords