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Training Hardware for Binarized Convolutional Neural Network Based on CMOS Invertible Logic

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0 Published in 2020 at "IEEE Access"

DOI: 10.1109/access.2020.3029576

Abstract: In this article, we implement fast and power-efficient training hardware for convolutional neural networks (CNNs) based on CMOS invertible logic. The backpropagation algorithm is generally hard to implement in hardware because it requires high-precision floating-point… read more here.

Keywords: invertible logic; cmos invertible; hardware; training ... See more keywords