Sub-15 nm gate-all-around field effect transistors on vertical silicon nanowires
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DOI: 10.1016/j.sse.2016.12.008
Abstract: Abstract A vertical MOS architecture implemented on Si nanowire (NW) array with a scaled Gate-All-Around (14 nm) and symmetrical diffusive S/D contacts is presented with noteworthy demonstrations in both processing (layer engineering at nanoscale), and in… read more here.
Keywords: around field; transistors vertical; sub gate; effect transistors ... See more keywords