LAUSR

Triple frame buffer FPGA implementation

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1 Published in 2019 at "HardwareX"

DOI: 10.1016/j.ohx.2019.e00064

Abstract: Abstract This article demonstrates a Verilog-based triple frame buffer capable of buffering arbitrary data, such as camera frames, between any two asynchronous processes. The frame buffer modules consume 143 logic elements and use a simple,… read more here.

Keywords: frame buffer; fpga implementation; triple frame; buffer fpga ... See more keywords