Articles with "wafer map" as a keyword



A patch-interactive enhancement network for semiconductor wafer map mixed defect recognition with a two-stage training strategy

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Published in 2025 at "Measurement Science and Technology"

DOI: 10.1088/1361-6501/adbc0d

Abstract: To improve the product quality and process reliability in the semiconductor manufacturing, it is of great significance to detect the defect of the wafer map and recognize the defect pattern. With the increase in the… read more here.

Keywords: patch interactive; interactive enhancement; recognition; wafer map ... See more keywords

Unsupervised Pre-Training of Imbalanced Data for Identification of Wafer Map Defect Patterns

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Published in 2021 at "IEEE Access"

DOI: 10.1109/access.2021.3068378

Abstract: Visual defect inspection and classification are significant steps of most manufacturing processes in the semiconductor and electronics industries. Known and unknown defects on wafer maps tend to cluster, and these spatial patterns provide valuable process… read more here.

Keywords: identification wafer; wafer map; defect; data augmentation ... See more keywords

Multiple Granularities Generative Adversarial Network for Recognition of Wafer Map Defects

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Published in 2022 at "IEEE Transactions on Industrial Informatics"

DOI: 10.1109/tii.2021.3092372

Abstract: Wafer map defect recognition (WMDR) is an important part of the integrated circuit manufacturing system. Accurate recognition of wafer map defects can help operators troubleshoot root causes of the abnormal process, and then accelerate the… read more here.

Keywords: recognition wafer; network; wafer map; wafer ... See more keywords

Large-Margin Extreme Learning Machines With Hybrid Features for Wafer Map Defect Recognition

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Published in 2024 at "IEEE Transactions on Instrumentation and Measurement"

DOI: 10.1109/tim.2024.3374295

Abstract: The critical information regarding the semiconductor manufacturing can be provided based on the wafer map defect patterns. Automatic wafer map defect identification with machine learning methods has recently received increasing attention. The wafer map defect… read more here.

Keywords: map defect; extreme learning; wafer map; defect recognition ... See more keywords

Wafer Map Defect Pattern Classification and Image Retrieval Using Convolutional Neural Network

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Published in 2018 at "IEEE Transactions on Semiconductor Manufacturing"

DOI: 10.1109/tsm.2018.2795466

Abstract: Wafer maps provide important information for engineers in identifying root causes of die failures during semiconductor manufacturing processes. We present a method for wafer map defect pattern classification and image retrieval using convolutional neural networks… read more here.

Keywords: wafer; image retrieval; wafer map;

Decision Tree Ensemble-Based Wafer Map Failure Pattern Recognition Based on Radon Transform-Based Features

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Published in 2018 at "IEEE Transactions on Semiconductor Manufacturing"

DOI: 10.1109/tsm.2018.2806931

Abstract: Wafer maps contain information about defects and clustered defects that form failure patterns. Failure patterns exhibit the information related to defect generation mechanisms. The accurate classification of failure patterns in wafer maps can provide crucial… read more here.

Keywords: decision; wafer map; tree ensemble; failure ... See more keywords

A Voting Ensemble Classifier for Wafer Map Defect Patterns Identification in Semiconductor Manufacturing

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Published in 2019 at "IEEE Transactions on Semiconductor Manufacturing"

DOI: 10.1109/tsm.2019.2904306

Abstract: A wafer map contains a graphical representation of the locations about defect pattern on the semiconductor wafer, which can provide useful information for quality engineers. Various defect patterns occur due to increasing wafer sizes and… read more here.

Keywords: semiconductor; wafer; wafer map; voting ensemble ... See more keywords

Wafer Map Defect Pattern Recognition Using Rotation-Invariant Features

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Published in 2019 at "IEEE Transactions on Semiconductor Manufacturing"

DOI: 10.1109/tsm.2019.2944181

Abstract: In semiconductor manufacturing, the patterns on the wafer map provide important information for engineers to identify the root causes of production problems. The detection and recognition of wafer map patterns is thus an important issue… read more here.

Keywords: invariant features; wafer map; rotation invariant; map defect ... See more keywords

Recognition and Classification of Mixed Defect Pattern Wafer Map Based on Multi-Path DCNN

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Published in 2024 at "IEEE Transactions on Semiconductor Manufacturing"

DOI: 10.1109/tsm.2024.3418520

Abstract: The semiconductor industry is the core industry of the information age. As a key link in the semiconductor industry, wafer fabrication plays a key role in its development. In the testing stage of the wafer,… read more here.

Keywords: classification; multi path; wafer map; mixed defect ... See more keywords

Wafer map defect classification using deep learning framework with data augmentation on imbalance datasets

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Published in 2025 at "EURASIP Journal on Image and Video Processing"

DOI: 10.1186/s13640-025-00666-3

Abstract: Wafer map defect classification is a key task for the semiconductor industry to improve the yield rate. Most wafer map defect classifications suffer from the problem of data imbalance and insufficient data. This paper proposes… read more here.

Keywords: classification; map defect; using deep; wafer map ... See more keywords
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Automated Detection and Classification of Defective and Abnormal Dies in Wafer Images

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Published in 2020 at "Applied Sciences"

DOI: 10.3390/app10103423

Abstract: This article presents an automated vision-based algorithm for the die-scale inspection of wafer images captured using scanning acoustic tomography (SAT). This algorithm can find defective and abnormal die-scale patterns, and produce a wafer map to… read more here.

Keywords: die; detection; wafer images; template ... See more keywords