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Published in 2020 at "Silicon"
DOI: 10.1007/s12633-020-00796-5
Abstract: Polyacetal is widely used in thin walled injection moulding due to its high mechanical properties. But, its widespread application is limited due to volumetric shrinkage and warpage. The investigations on reducing warpage on Polyacetal is…
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Keywords:
crystallinity;
fumed silica;
nano fumed;
walled parts ... See more keywords
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Published in 2017 at "Additive manufacturing"
DOI: 10.1016/j.addma.2017.10.018
Abstract: Abstract Selective Laser Sintering (SLS) is a rapidly growing additive manufacturing process, because it has the capacity to build parts from a variety of materials. However, the dimensional accuracy of the fabricated parts in this…
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Keywords:
polymer;
optimization process;
process;
warpage ... See more keywords
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Published in 2019 at "Semiconductor Science and Technology"
DOI: 10.1088/1361-6641/aafccd
Abstract: In this study, the wafer warpage resulting from common source line tungsten (CSL W) is investigated in 3D NAND flash memory. It is found that the warpage is related to the annealing conditions after CSL…
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Keywords:
flash memory;
warpage;
wafer warpage;
nand flash ... See more keywords
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Published in 2017 at "Journal of Applied Crystallography"
DOI: 10.1107/s1600576717003132
Abstract: X-ray diffraction imaging in both monochromatic and white beam section mode has been used to measure quantitatively the displacement and warpage stress in encapsulated silicon devices.
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Keywords:
ray diffraction;
diffraction measurement;
warpage;
nondestructive ray ... See more keywords
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Published in 2021 at "Circuit World"
DOI: 10.1108/cw-02-2021-0061
Abstract: Purpose This study aims to simulate molded printed circuit board (PCB) warpage behavior under reflow temperature distribution. Simulation models are used to estimate dynamic warpage behavior for different form factor sizes. Design/methodology/approach This study analyzes…
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Keywords:
temperature;
process;
molded pcb;
warpage ... See more keywords
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Published in 2019 at "Rapid Prototyping Journal"
DOI: 10.1108/rpj-04-2018-0098
Abstract: Purpose The purpose of this work is to explain the emergence of warpage due to a locally and temporally inhomogeneous shrinkage in 3D printing (Binder-Jetting) of polymers. Design/methodology/approach An analysis of shrinkage yields parameters for…
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Keywords:
shrinkage;
warpage;
process;
process model ... See more keywords
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Published in 2022 at "IEEE Access"
DOI: 10.1109/access.2022.3170455
Abstract: As laptops get thinner and thinner, the electronic packages that go into these devices must shrink along the z-dimension as well. High warpage in these ultra-thin packages is the result of mismatch of coefficients of…
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Keywords:
electronic packages;
warpage;
ultra thin;
warpage inverse ... See more keywords
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Published in 2017 at "IEEE Transactions on Components, Packaging and Manufacturing Technology"
DOI: 10.1109/ectc.2017.309
Abstract: In this paper, the warpage and thermal performances of fan-out wafer-level packaging (FOWLP) are investigated. Emphasis is placed on the characterization of the effects of FOWLP important parameters, such as chip size, chip thickness, package/chip…
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Keywords:
wafer level;
level packaging;
warpage thermal;
warpage ... See more keywords
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Published in 2017 at "IEEE Transactions on Components, Packaging and Manufacturing Technology"
DOI: 10.1109/tcpmt.2017.2726084
Abstract: Nowadays, fan-out package is regarded as one of the latest and most potential technologies because it possesses lower cost, thinner profile, and better electrical performance and thermal performance. However, thermally induced warpage in the molding…
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Keywords:
process;
geometry;
fan package;
warpage ... See more keywords
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Published in 2019 at "IEEE Transactions on Components, Packaging and Manufacturing Technology"
DOI: 10.1109/tcpmt.2018.2889308
Abstract: The fan-out interposer (FOI) technology with fine pitch is demonstrated and presented for heterogeneous integration as a cost-effective and enabling technology. The co-design modeling methodology is established for the FOI technology, including wafer process-induced warpage,…
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Keywords:
warpage;
technology;
reliability;
fan interposer ... See more keywords
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Published in 2020 at "IEEE Transactions on Components, Packaging and Manufacturing Technology"
DOI: 10.1109/tcpmt.2020.2975571
Abstract: A six-side molded wafer-level chip scale package (mWLCSP) is a novel and attractive packaging method for smart phone applications due to its lower cost, better electrical performance, and higher long-term reliability. Nevertheless, wafer warpage in…
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Keywords:
control;
packaging processes;
warpage;
six side ... See more keywords