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Published in 2024 at "Semiconductor Science and Technology"
DOI: 10.1088/1361-6641/ad5e17
Abstract: In this work, we systematically investigate the DC performance of fully depleted silicon-on-insulator (FD-SOI) MOSFETs at both room and cryogenic temperatures as low as 77 K. The influences of back-gate bias on normal and flip-well…
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Keywords:
cryogenic temperatures;
back gate;
well devices;
behaviors back ... See more keywords