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Published in 2017 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"
DOI: 10.1109/tcad.2017.2697947
Abstract: In this paper, we propose Lagrangian relaxation (LR)-based algorithms to optimize both circuit performance and total wirelength at the global placement stage. We introduce a general timing-driven global placement problem formulation that is applicable to…
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Keywords:
wirelength;
lagrangian relaxation;
timing driven;
placement ... See more keywords