Articles with "write verify" as a keyword



Monolayer Vacancy-Induced MXene Memory for Write-Verify-Free Programming.

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Published in 2024 at "Small"

DOI: 10.1002/smll.202402273

Abstract: The fundamental logic states of 1 and 0 in Complementary Metal-Oxide-Semiconductor (CMOS) are essential for modern high-speed non-volatile solid-state memories. However, the accumulated storage signal in conventional physical components often leads to data distortion after… read more here.

Keywords: write verify; memory; monolayer vacancy; logic ... See more keywords

A 40-nm MLC-RRAM Compute-in-Memory Macro With Sparsity Control, On-Chip Write-Verify, and Temperature-Independent ADC References

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Published in 2022 at "IEEE Journal of Solid-State Circuits"

DOI: 10.1109/jssc.2022.3163197

Abstract: Resistive random access memory (RRAM)-based compute-in-memory (CIM) has shown great potential for accelerating deep neural network (DNN) inference. However, device characteristics, such as low-resistance values, susceptibility to drift, and single-level cells, may limit the capabilities… read more here.

Keywords: chip write; sparsity; write verify; memory ... See more keywords

IDWA: A Importance-Driven Weight Allocation Algorithm for Low Write–Verify Ratio RRAM-Based In-Memory Computing

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Published in 2025 at "IEEE Transactions on Very Large Scale Integration (VLSI) Systems"

DOI: 10.1109/tvlsi.2025.3578388

Abstract: Resistive random access memory (RRAM)-based in-memory computing (IMC) architectures are currently receiving widespread attention. Since this computing approach relies on the analog characteristics of the devices, the write variation of RRAM can affect the computational… read more here.

Keywords: write verify; memory; memory computing; rram based ... See more keywords