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Published in 2020 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2019.2963616
Abstract: We present XNOR-SRAM, a mixed-signal in-memory computing (IMC) SRAM macro that computes ternary-XNOR-and-accumulate (XAC) operations in binary/ternary deep neural networks (DNNs) without row-by-row data access. The XNOR-SRAM bitcell embeds circuits for ternary XNOR operations, which…
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Keywords:
memory computing;
ternary deep;
sram macro;
xnor sram ... See more keywords